Overview
The AD9253BCPZ-105 is a quad, 14-bit analog-to-digital converter (ADC) designed by Analog Devices. This device is optimized for low power consumption, small size, and ease of use, making it suitable for a variety of high-performance applications. It operates at conversion rates of up to 105 MSPS and features an on-chip sample-and-hold circuit. The ADC is powered by a single 1.8 V supply and supports LVPECL-, CMOS-, and LVDS-compatible sample rate clocks. The device is packaged in a RoHS-compliant, 48-lead LFCSP and is specified over the industrial temperature range of −40°C to +85°C.
Key Specifications
| Parameter | Unit | Min | Typ | Max |
|---|---|---|---|---|
| Resolution | Bits | 14 | 14 | 14 |
| Sample Rate | MSPS | 80 | 105 | 125 |
| Power Consumption per Channel | mW | - | 110 | - |
| SNR (to Nyquist) | dB | - | 74 | - |
| SFDR (to Nyquist) | dBc | - | 90 | - |
| DNL (typical) | LSB | -0.75 | - | - |
| INL (typical) | LSB | - | ±2.0 | - |
| Analog Bandwidth | MHz | - | 650 | - |
| Input Voltage Range | V p-p | - | 2 | - |
| Operating Temperature | °C | -40 | - | 85 |
Key Features
- 1.8 V supply operation
- Low power consumption: 110 mW per channel at 125 MSPS with scalable power options
- Serial LVDS (ANSI-644, default) and low power, reduced signal option (similar to IEEE 1596.3)
- Serial port control
- Full chip and individual channel power-down modes
- Flexible bit orientation
- Built-in and custom digital test pattern generation
- Multichip sync and clock divider
- Programmable output clock and data alignment
- Programmable output resolution
- Standby mode
Applications
- Medical ultrasound
- High-speed imaging
- Quadrature and diversity radio receivers
- Test equipment
Q & A
- What is the resolution of the AD9253BCPZ-105?
The AD9253BCPZ-105 has a resolution of 14 bits.
- What are the available sample rates for the AD9253BCPZ-105?
The AD9253BCPZ-105 supports sample rates of 80 MSPS, 105 MSPS, and 125 MSPS.
- What is the power consumption per channel at 125 MSPS?
The power consumption per channel at 125 MSPS is 110 mW.
- What is the signal-to-noise ratio (SNR) of the AD9253BCPZ-105?
The SNR of the AD9253BCPZ-105 is 74 dB (to Nyquist).
- What is the spurious-free dynamic range (SFDR) of the AD9253BCPZ-105?
The SFDR of the AD9253BCPZ-105 is 90 dBc (to Nyquist).
- What is the differential nonlinearity (DNL) of the AD9253BCPZ-105?
The DNL of the AD9253BCPZ-105 is ±0.75 LSB (typical).
- What is the input voltage range of the AD9253BCPZ-105?
The input voltage range of the AD9253BCPZ-105 is 2 V p-p.
- Does the AD9253BCPZ-105 support power-down modes?
Yes, the AD9253BCPZ-105 supports full chip and individual channel power-down modes.
- What types of digital test patterns can the AD9253BCPZ-105 generate?
The AD9253BCPZ-105 can generate built-in deterministic and pseudorandom patterns, as well as custom user-defined test patterns via the serial port interface (SPI).
- What is the operating temperature range of the AD9253BCPZ-105?
The operating temperature range of the AD9253BCPZ-105 is −40°C to +85°C.
